Commit 3979cd06 authored by Michael Welling's avatar Michael Welling

Update refresh timings on 64MB RAM

Old refresh cycle was too long for the new RAM causing failures at high temperatures.
Signed-off-by: Michael Welling's avatarMichael Welling <mwelling@ieee.org>
parent 26a4d6a9
......@@ -3,7 +3,7 @@ ifndef ERASE_FCT
ERASE_FCT=rm -f
endif
ifndef CROSS_COMPILE
CROSS_COMPILE=/home/mwelling/projects/integrys/arm-elf-toolchain/bin/arm-elf-
CROSS_COMPILE=/home/michael/projects/integrys/arm-elf-toolchain/bin/arm-elf-
#CROSS_COMPILE=/home/travis/projects/arm/som9260/arm-elf-toolchain/bin/arm-elf-
endif
......
......@@ -50,8 +50,8 @@
#define CFG_HW_INIT
#define CFG_SDRAM
//#define CFG_SDRAM_16M
#define CFG_SDRAM_32M
//#define CFG_SDRAM_64M
//#define CFG_SDRAM_32M
#define CFG_SDRAM_64M
#define CFG_DEBUG
//#define DEBUG_NOR
......
......@@ -173,7 +173,7 @@ void hw_init(void)
AT91C_SDRAMC_TRCD_3 |
AT91C_SDRAMC_TRAS_6 |
AT91C_SDRAMC_TXSR_9, /* Control Register */
0x65B); /* Refresh Timer Register */
0x307); /* Refresh Timer Register */
#endif
......
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