Commit 5d9a7913 authored by Mike Dean's avatar Mike Dean
Browse files

Merge support for /sys/class/egpio/boot_control

parents 4ca3fd62 71189987
* Atmel Extensible Direct Memory Access Controller (XDMAC)
Required properties:
- compatible: Should be "atmel,<chip>-dma".
- reg: Should contain DMA registers location and length.
- interrupts: Should contain DMA interrupt.
- #dma-cells: Must be <2>, used to represent the number of integer cells in
the dmas property of client devices.
Example:
dma1: dma-controller@f0004000 {
compatible = "atmel,sama5d4-dma";
reg = <0xf0004000 0x200>;
interrupts = <50 4 0>;
#dma-cells = <2>;
};
DMA clients connected to the Atmel XDMA controller must use the format
described in the dma.txt file, using a three-cell specifier for each channel:
a phandle plus two integer cells.
The two cells in order are:
1. A phandle pointing to the DMA controller.
2. The memory interface (16 most significant bits), the peripheral interface
(16 less significant bits).
3. Channel configuration register. Configurable fields are:
- bit 30-24: PERID, peripheral identifier.
Example:
i2c2: i2c@f8024000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8024000 0x4000>;
interrupts = <34 4 6>;
dmas = <&dma0 0x00000001 0x06000000>,
<&dma0 0x00000001 0x07000000>;
dma-names = "tx", "rx";
};
......@@ -21,6 +21,9 @@ Optional properties:
"soft_bch".
- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware.
Only supported by at91sam9x5 or later sam9 product.
- atmel,nand-pmecc-correct-erase-page : boolean, true means the Programmable
Multibit ECC hardware support encode all 0xff data sector to 0xff ecc bytes.
Only SAMA5D4 and later chips has this feature.
- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC
Controller. Supported values are: 2, 4, 8, 12, 24.
- atmel,pmecc-sector-size : sector size for ECC computation. Supported values
......
......@@ -90,6 +90,8 @@ MULTIDRIVE (1 << 1): indicate this pin need to be configured as multidrive.
DEGLITCH (1 << 2): indicate this pin need deglitch.
PULL_DOWN (1 << 3): indicate this pin need a pull down.
DIS_SCHMIT (1 << 4): indicate this pin need to disable schmit trigger.
OUTPUT (1 << 5): indicate this pin need to be configured as an output.
OUTPUT_VAL (0x1 << 6): output val (1 = high, 0 = low)
DEBOUNCE (1 << 16): indicate this pin need debounce.
DEBOUNCE_VAL (0x3fff << 17): debounce val.
......
ACT8865 regulator
-------------------
Required properties:
- compatible: "active-semi,act8865"
- reg: I2C slave address
Example:
--------
i2c1: i2c@f0018000 {
status = "okay";
pmic: act8865@5b {
compatible = "active-semi,act8865";
reg = <0x5b>;
regulators {
vcc_1v8_reg: DCDC_REG1 {
regulator-name = "DCDC_REG1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vcc_1v2_reg: DCDC_REG2 {
regulator-name = "DCDC_REG2";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-suspend-mem-microvolt = <1150000>;
regulator-suspend-standby-microvolt = <1150000>;
regulator-always-on;
};
vcc_3v3_reg: DCDC_REG3 {
regulator-name = "DCDC_REG3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vddfuse_reg: LDO_REG4 {
regulator-name = "LDO_REG4";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
};
vddana_reg: LDO_REG5 {
regulator-name = "LDO_REG5";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
};
......@@ -9,8 +9,11 @@ Optional properties:
- regulator-max-microamp: largest current consumers may set
- regulator-always-on: boolean, regulator should never be disabled
- regulator-boot-on: bootloader/firmware enabled regulator
- regulator-allow-bypass: allow the regulator to go into bypass mode
- <name>-supply: phandle to the parent supply/regulator node
- regulator-ramp-delay: ramp delay for regulator(in uV/uS)
For hardwares which support disabling ramp rate, it should be explicitly
intialised to zero (regulator-ramp-delay = <0>) for disabling ramp delay.
Deprecated properties:
- regulator-compatible: If a regulator chip contains multiple
......
* Atmel at91sam9x5ek wm8731 audio complex
Required properties:
- compatible: "atmel,sam9x5-wm8731-audio"
- atmel,model: The user-visible name of this sound complex.
- atmel,ssc-controller: The phandle of the SSC controller
- atmel,audio-codec: The phandle of the WM8731 audio codec
- atmel,audio-routing: A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source.
Available audio endpoints for the audio-routing table:
Board connectors:
* Headphone Jack
* Line In Jack
wm8731 pins:
cf Documentation/devicetree/bindings/sound/wm8731.txt
Example:
sound {
compatible = "atmel,sam9x5-wm8731-audio";
atmel,model = "wm8731 @ AT91SAM9X5EK";
atmel,audio-routing =
"Headphone Jack", "RHPOUT",
"Headphone Jack", "LHPOUT",
"LLINEIN", "Line In Jack",
"RLINEIN", "Line In Jack";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8731>;
};
* Atmel AC97 controller
Required properties:
- compatible: "atmel,atmel_ac97c"
- reg: Address and length of the register set for the device
- interrupts: Should contain AC97 interrupt
- atmel,reset-pin: GPIO for resetting the codec
Optional properties:
- pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt
Example:
sound@fffa0000 {
compatible = "atmel,atmel_ac97c";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ac97>;
reg = <0xfffa0000 0x4000>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,reset-pin = <&pioC 29 GPIO_ACTIVE_LOW>;
};
......@@ -16,3 +16,12 @@ codec: wm8731@1a {
compatible = "wlf,wm8731";
reg = <0x1a>;
};
Available audio endpoints for an audio-routing table:
* LOUT: Left Channel Line Output
* ROUT: Right Channel Line Output
* LHPOUT: Left Channel Headphone Output
* RHPOUT: Right Channel Headphone Output
* LLINEIN: Left Channel Line Input
* RLINEIN: Right Channel Line Input
* MICIN: Microphone Input
......@@ -11,6 +11,9 @@ Required properties:
- atmel,oc-gpio: If present, specifies a gpio that needs to be
activated for the overcurrent detection.
Option properties:
- wakeup-source: with this protery, the ohci can wake up system.
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
......
......@@ -1734,8 +1734,9 @@ config HW_PERF_EVENTS
source "mm/Kconfig"
config FORCE_MAX_ZONEORDER
int "Maximum zone order" if ARCH_SHMOBILE
int "Maximum zone order" if ARCH_SHMOBILE || ARCH_AT91
range 11 64 if ARCH_SHMOBILE
range 11 15 if ARCH_AT91
default "12" if SOC_AM33XX
default "9" if SA1111
default "11"
......
......@@ -89,6 +89,10 @@ choice
bool "Kernel low-level debugging on 9263 and 9g45"
depends on HAVE_AT91_DBGU1
config AT91_DEBUG_LL_DBGU2
bool "Kernel low-level debugging on sama5d4"
depends on HAVE_AT91_DBGU2
config DEBUG_BCM2835
bool "Kernel low-level debugging on BCM2835 PL011 UART"
depends on ARCH_BCM2835
......
......@@ -49,16 +49,38 @@ dtb-$(CONFIG_ARCH_AT91) += at91-sama5d3_xplained_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d31ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d31ek_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d31ek_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d31ek_revc.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d31ek_revc_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d31ek_revc_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d33ek_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d33ek_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d33ek_revc.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d33ek_revc_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d33ek_revc_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek_revc.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek_revc_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek_revc_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek_revc.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek_hdmi.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek_revc.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek_revc_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek_revc_pda7.dtb
dtb-$(CONFIG_ARCH_AT91) += som-a5d35-150es.dtb
dtb-$(CONFIG_ARCH_AT91) += som-a5d36-200es.dtb
# sama5d4
dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4_xplained.dtb
dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4_xplained_pda4.dtb
dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4_xplained_hdmi.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d4ek.dtb
dtb-$(CONFIG_ARCH_AT91) += sama5d4ek_hdmi.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb
......
......@@ -152,6 +152,11 @@
atmel,pins =
<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */
};
pinctrl_key_gpio: key_gpio_0 {
atmel,pins =
<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
};
};
......@@ -224,6 +229,9 @@
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_key_gpio>;
bp3 {
label = "PB_USER";
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
......@@ -247,3 +255,5 @@
};
};
};
#include "at91-sama5d3_xplained_pin_sleep_state.dtsi"
/*
* at91-sama5d3_xplained_pda4.dts - Device Tree file for the SAMA5D3 Xplained board
* at91-sama5d3_xplained_pda4.dts - Device Tree file for the SAMA5D3 Xplained board with TM43xx display panel
*
* Copyright (C) 2014 Atmel,
* 2014 Ludovic Desroches <ludovic.desroches@atmel.com>
......@@ -11,7 +11,7 @@
#include "at91-sama5d3_xplained_dm_pda4.dtsi"
/ {
model = "SAMA5D3 Xplained";
model = "Atmel SAMA5D3 Xplained TM43xx";
compatible = "atmel,sama5d3-xplained", "pda,tm43xx", "atmel,sama5d3", "atmel,sama5";
chosen {
......
/*
* at91-sama5d3_xplained_pda7.dts - Device Tree file for the SAMA5D3 Xplained board
* at91-sama5d3_xplained_pda7.dts - Device Tree file for the SAMA5D3 Xplained board with TM70xx display panel
*
* Copyright (C) 2014 Atmel,
* 2014 Ludovic Desroches <ludovic.desroches@atmel.com>
......@@ -11,7 +11,7 @@
#include "at91-sama5d3_xplained_dm_pda7.dtsi"
/ {
model = "SAMA5D3 Xplained";
model = "Atmel SAMA5D3 Xplained TM70xx";
compatible = "atmel,sama5d3-xplained", "pda,tm70xx", "atmel,sama5d3", "atmel,sama5";
chosen {
......
/*
* at91-sama5d3_xplained_pin_sleep_state.dtsi - Device Tree Include file for the SAMA5D3 Xplained board
*
* Copyright (C) 2014 Atmel,
*
* Licensed under GPLv2 or later.
*/
/ {
ahb {
apb {
mmc0: mmc@f0000000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_mmc0_clk_cmd_dat0_sleep &pinctrl_mmc0_dat1_3_sleep &pinctrl_mmc0_dat4_7_sleep>;
};
spi0: spi@f0004000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_spi0_sleep>;
};
can0: can@f000c000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_can0_rx_tx_sleep>;
};
can1: can@f8010000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_can1_rx_tx_sleep>;
};
i2c0: i2c@f0014000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_i2c0_sleep>;
};
i2c1: i2c@f0018000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_i2c1_sleep>;
};
macb0: ethernet@f0028000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_macb0_data_rgmii_sleep &pinctrl_macb0_signal_rgmii_sleep>;
};
macb1: ethernet@f802c000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_macb1_rmii_sleep>;
};
pwm0: pwm@f002c000 {
status = "disabled";
};
usart0: serial@f001c000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_usart0_sleep>;
};
usart1: serial@f0020000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_usart1_sleep &pinctrl_usart1_rts_cts_sleep>;
};
uart0: serial@f0024000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_uart0_sleep>;
};
mmc1: mmc@f8000000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_mmc1_clk_cmd_dat0_sleep &pinctrl_mmc1_dat1_3_sleep>;
};
spi1: spi@f8008000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_spi1_sleep>;
};
adc0: adc@f8018000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <
&pinctrl_adc0_adtrg_sleep
&pinctrl_adc0_ad0_sleep
&pinctrl_adc0_ad1_sleep
&pinctrl_adc0_ad2_sleep
&pinctrl_adc0_ad3_sleep
&pinctrl_adc0_ad4_sleep
&pinctrl_adc0_ad5_sleep
&pinctrl_adc0_ad6_sleep
&pinctrl_adc0_ad7_sleep
&pinctrl_adc0_ad8_sleep
&pinctrl_adc0_ad9_sleep
>;
status = "disabled";
};
i2c2: i2c@f801c000 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_i2c2_sleep>;
status = "disabled";
};
dbgu: serial@ffffee00 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&pinctrl_dbgu_sleep>;
};
pinctrl@fffff200 {
mmc0 {
pinctrl_mmc0_clk_cmd_dat0_sleep: mmc0_clk_cmd_dat0_1 {
atmel,pins =
<AT91_PIOD 9 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PD9 GPIO output 0 */
AT91_PIOD 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD0 GPIO Input with pullup */
AT91_PIOD 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD1 GPIO Input with pullup */
};
pinctrl_mmc0_dat1_3_sleep: mmc0_dat1_3_1 {
atmel,pins =
<AT91_PIOD 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD2 GPIO Input with pullup */
AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 GPIO Input with pullup */
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 GPIO Input with pullup */
};
pinctrl_mmc0_dat4_7_sleep: mmc0_dat4_7_1 {
atmel,pins =
<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 GPIO Input with pullup */
AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD6 GPIO Input with pullup */
AT91_PIOD 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD7 GPIO Input with pullup */
AT91_PIOD 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD8 GPIO Input with pullup */
};
};
spi0 {
pinctrl_spi0_sleep: spi0-1 {
atmel,pins =
<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD10 GPIO Input with pullup */
AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD11 GPIO Input with pullup */
AT91_PIOD 12 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD12 GPIO Input with pullup */
};
};
can0 {
pinctrl_can0_rx_tx_sleep: can0_rx_tx-1 {
atmel,pins =
<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD14 GPIO Input with pullup */
AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 GPIO Input with pullup */
};
};
can1 {
pinctrl_can1_rx_tx_sleep: can1_rx_tx-1 {
atmel,pins =
<AT91_PIOB 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB14 GPIO Input with pullup */
AT91_PIOB 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB15 GPIO Input with pullup */
};
};
i2c0 {
pinctrl_i2c0_sleep: i2c0-1 {
atmel,pins =
<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA30 GPIO Input with pullup */
AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PA31 GPIO Input with pullup */
};
};
i2c1 {
pinctrl_i2c1_sleep: i2c1-1 {
atmel,pins =
<AT91_PIOC 26 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(1)) /* PC26 GPIO output 1 */
AT91_PIOC 27 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(1))>; /* PC27 GPIO output 1 */
};
};
macb0 {
pinctrl_macb0_data_rgmii_sleep: macb0_data_rgmii_1 {
atmel,pins =
<AT91_PIOB 0 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PB0 GPIO output 0 */
AT91_PIOB 1 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PB1 GPIO output 0 */
AT91_PIOB 2 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PB2 GPIO output 0 */
AT91_PIOB 3 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PB3 GPIO output 0 */
AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB4 GPIO input with pullup */
AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB5 GPIO input with pullup */
AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB6 GPIO input with pullup */
AT91_PIOB 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB7 GPIO input with pullup */
};
pinctrl_macb0_signal_rgmii_sleep: macb0_signal_rgmii_1 {
atmel,pins =
<AT91_PIOB 8 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PB8 GPIO output 0 */
AT91_PIOB 9 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PB9 GPIO output 0 */
AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_NONE /* PB11 GPIO input default */
AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE /* PB13 GPIO input default */
AT91_PIOB 16 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PB16 GPIO output 0 */
AT91_PIOB 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB17 GPIO Input with pullup */
AT91_PIOB 18 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; /* PB18 GPIO output 0 */
};
};
macb1 {
pinctrl_macb1_rmii_sleep: macb1_rmii-1 {
atmel,pins =
<AT91_PIOC 0 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PC0 GPIO output 0 */
AT91_PIOC 1 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PC1 GPIO output 0 */
AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 GPIO input with pullup */
AT91_PIOC 3 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PC3 GPIO output 0 */
AT91_PIOC 4 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PC4 GPIO output 0 */
AT91_PIOC 5 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PC5 GPIO output 0 */
AT91_PIOC 6 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PC6 GPIO output 0 */
AT91_PIOC 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE /* PC7 GPIO input default */
AT91_PIOC 8 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PC8 GPIO output 1 */
AT91_PIOC 9 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(1))>; /* PC9 GPIO output 1 */
};
};
usart0 {
pinctrl_usart0_sleep: usart0-1 {
atmel,pins =
<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD17 GPIO input with pullup */
AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD18 GPIO input with pullup */
};
};
usart1 {
pinctrl_usart1_sleep: usart1-1 {
atmel,pins =
<AT91_PIOB 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB28 GPIO input with pullup */
AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB29 GPIO input with pullup */
};
pinctrl_usart1_rts_cts_sleep: usart1_rts_cts-1 {
atmel,pins =
<AT91_PIOB 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB26 GPIO input with pullup */
AT91_PIOB 27 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB27 GPIO input with pullup */
};
};
uart0 {
pinctrl_uart0_sleep: uart0-1 {
atmel,pins =
<AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC29 GPIO input with pullup */
AT91_PIOC 30 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC30 GPIO input with pullup */
};
};
mmc1 {
pinctrl_mmc1_clk_cmd_dat0_sleep: mmc1_clk_cmd_dat0_1 {
atmel,pins =
<AT91_PIOB 24 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0)) /* PB24 GPIO output 0 */
AT91_PIOB 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB19 GPIO Input with pullup */
AT91_PIOB 20 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB20 GPIO Input with pullup */
};
pinctrl_mmc1_dat1_3_sleep: mmc1_dat1_3_1 {
atmel,pins =
<AT91_PIOB 21 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB21 GPIO Input with pullup */
AT91_PIOB 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PB22 GPIO Input with pullup */
AT91_PIOB 23 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB23 GPIO Input with pullup */
};
};
spi1 {
pinctrl_spi1_sleep: spi1-1 {
atmel,pins =
<AT91_PIOC 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC22 GPIO Input with pullup */
AT91_PIOC 23 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC23 GPIO Input with pullup */
AT91_PIOC 24 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC24 GPIO Input with pullup */
};
};
adc0 {
pinctrl_adc0_adtrg_sleep: adc0_adtrg-1 {
atmel,pins =
<AT91_PIOD 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD19 GPIO Input with pullup */
};
pinctrl_adc0_ad0_sleep: adc0_ad0-1 {
atmel,pins =
<AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD20 GPIO Input with pullup */
};
pinctrl_adc0_ad1_sleep: adc0_ad1-1 {
atmel,pins =
<AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD21 GPIO Input with pullup */