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In sama SoCs, the SRAM is mapped at CONFIG_LINK_ADDR.
This means the reset vectors are at address CONFIG_LINK_ADDR considering
how at91bootstrap is currently linked
The RomCode may remap SRAM at address 0x0 before jumping to at91bootstrap.
This is why the reset vectors are actually used correctly: they are also
available at 0x0 address (for all sama5 devices).
However this leads to jumping to the 'mirror' of the SRAM in case of
exceptions.
We have to make sure that we keep the CONFIG_LINK_ADDR config valid in all
circumstances, and configure the Core with this link address as a base for
reset vectors.
By configuring CP15 and VBAR, we can achieve this, the fact that the
reset vectors are actually at CONFIG_LINK_ADDR.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>